Computer Organization and Architecture (2-1-1)

 

SPRING 2019-20
Lecture: Monday(8:45 AM-10:45 AM); Lab: Monday(10:50 AM - 1:50 PM); Tuesday(8:45 AM - 10:45 AM);

Venue: Room-5006, CC3 Building

 

 

 

 

Course Objective:

This course is primarily meant to teach undergraduate students the basic operations of computing hardware and how it interfaces to software. It would provide the students the understanding of system-level programming and provide a high-level understanding of the role played by compilers, assemblers, instruction sets, and hardware. Students would know how to represent fixed-point and floating point numbers in computer and develop hardware algorithms using them for fixed-point and floating point arithmetic. The course would display understanding of instruction set of RISC processor and develop understanding of how memory is organised and managed in a modern digital computer, including cache , virtual and physical memory. It discusses input-output units and how they communicate with the processor, and how their performance is computed. Finally the students would be able to analyse the performance of a digital computer using different parameters and profiling results for various algorithms in a benchmark.

Course Outline:

Modules Topics
Module 1 : Introduction - Overview of Computer Organisation and Architecture; Data Representation Introduction to Computer Organization and Architecture; Basic organization of computer and block level description of the functional units; Evolution of Computers, Von Neumann model
Review of Digital Systems - Combinatorial and Sequential logic elements, Memory system design: semiconductor memory technologies, memory organization; Concept of Finite State Machine; Introduction to buses and connecting I/O devices to CPU and Memory, bus structure
Number representation: Binary Data representation, Signed Number representation, Fixed and Floating point data representations. IEEE 754 floating point number representation
Module 2: Instructing a Computer CPU Architecture, Register Organization , Instruction formats, basic instruction cycle, Instruction interpretation and Sequencing, RTL interpretation of instructions, addressing modes, instruction set.
Case study - instruction sets of MIPS processor; Assembly language programming using MIPS instruction set
Module 3: Arithmetic Algorithms Integer Data computation: Addition, Subtraction, Multiplication: Signed multiplication, Booth's algorithm, Division of integers: Restoring and non-restoring division
Floating point arithmetic: Addition, subtraction, multiplication and division
Module 4: Memory Organisation Introduction to Memory and Memory parameters. Classifications of primary and secondary memories. Types of RAM and ROM, Allocation policies, Memory hierarchy and characteristics.
Cache memory: Concept, architecture (L1, L2, L3), mapping techniques. Cache Coherency, Interleaved and Associative Memory Virtual Memory: Concept, Segmentation and Paging , Page replacement policies.
Module 5: I/O Organization and Peripherals Input/output systems, I/O modules and IO processor
Types of data transfer techniques: Programmed I/O, Interrupt driven I/O and DMA.
Module 6 : Assessing and Enhancing Performance of Computer Systems CPU Performance and its Factors, Evaluating Performance
Enhancing Performnace - Pipeline Processing, instruction pipelining, pipeline stages and pipeline hazards,
Parallel Processing Concepts - Flynn's classifications
Specialized Architectures - Multi-core systems, GPU

Text Book:

 

1.      David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface Morgan Kaufmann ARM Edition, 2010.

 

 

References:

 

1.      John L. Hennessy and David A. Patterson, Computer Architecture -- A Quantitative Approach, 5th Edition, Morgan Kaufmann Publications, Elsevier, Inc., 2012.

2.      Carl Hamachar, Zvonco Vranesic and Safwat Zaky, Computer Organization, McGraw Hill

3.      William Stallings, Computer Organization and Architecture: Designing for Performance, Pearson Education

4.      John P. Hayes , Computer Architecture and Organization, McGraw Hill

5.      Morris Mano , Computer System Architecture, Pearson Education

6.      Michael D. Ciletti , Advanced Digital Design with the Verilog HDL, 2nd Edition, Pearson

 

 

 

 

Important Instructions:

1.         Classes will be conducted using slide presentation as well as chalk-board.

2.         Official slide sets and miscellaneous study materials from some of the main text books and elsewhere will be uploaded on the web site on a regular basis.

3.         Every student is expected to have access to at least one of the references mentioned above .

4.         Attendance in the classes is mandatory. If the attendance of a student falls below 75% at the end of the C2 component, he/she will be dropped from the course

5.         Grading Policy :

o   30%: Component 1 - Closed book exam (10%); Take home assignment (10%) and Lab assignment (10%)

o   30%: Component 2 - Closed book exam (10%); Take home assignment (10%) and Lab assignment (10%)

o   40%: Component 3 - Closed book written exam

6.         Take home assignments : They will be assigned at the beginning of a module (announcements will be made on the course web-site every week). These assignments will not only help you in development of an in-depth idea of each topic of the course but will also serve to prepare for your written examinations. They will be evaluated during tutorial classes. You will have to explain your solution to the TAs during tutorial classes ( deadlines will be mentioned on the course website) and you may be assigned group projects which have to be demonstrated during tutorial sessions.

7.         All submissions must be made using Google Classroom . You will be notified about mode and way to submit in the tutorial classes. Submissions after the deadline will not be considered.

8.         Academic Integrity Policy: While collaboration on homework is permitted, blatant copying will not be tolerated. Violators, if caught, will subject to penalties ranging from a zero for the homework assignment in question to an being dropped for the course.

Lab Course Outline:

 

The lab classes will mainly consist of (a) Simulation of Verilog models for digital systems (including data path and control path design of a simple hypothetical CPU) using proprietory/open source simulation tools (b) simulation of MIPS32 programs using MARS/SPIM simulator. It is expected that students perform the lab assignments seriously to have a more refined knowledge of the topics.

Tools and Language

The vehicular language used for understanding the instruction set architecture would be "MIPS Assembly". In addition "Verilog" would be used for the design and simulation of basic components of the computer system.
All codes, assignments and lab exercises will be implemented in MIPS Assembly and Verilog language only.
The prefered simulators would be (i) MARS simulator for simulating the MIPS instructions (ii) Modelsim to simulate the Verilog models

Regarding Modelsim

Modelsim is available in both Linux and Windows environment. We will be using the Linux version in the labs.

A local copy of the software has been provided on the course website (scroll down on this page).
1. Refer to the Course Contents section of this page
2. Download the .run file from the Modelsim Setup - Linux link and follow the instructions provided at Installing Modelsim
3. Consult the TAs in case of difficulty in download and installation.

A student edition of the Modelsim software ( in Windows environment) can be obtained from [here]

Regarding MARS

1. MARS Simulator requires the Java Run Time environment (JRE). A local copy of JRE and MARS has been provided for download through the course website.
2. Consult the TAs in case of difficulty in download and installation.
3. Necessary instructions and tutorials have also been provided in the lab resources section of the course website to help in installation of MARS32.

Open Source Simulators

Most students prefer using open source Verilog simulators such as Icarus Verilog commonly known as Iverilog while working at home. You are encouraged to download and install Iverilog in your machines, and use these software instead of non-standard software.
Visit the following links in case you wish to use Iverilog :
1. Setting up your environment for programming in Iverilog (Windows/Linux)
2. Tutorial: Verilog Programming using Iverilog Simulator

Machines, OS and Editors

The computer systems for the course are the machines in Lab 5422.

The preferred operating system for the tutorials and lab would be Ubuntu Linux. It is a good idea to have linux installed on your machine. Linux can co-exist with windows, if you have that already installed. Otherwise, if you like to have both then you should install windows first and linux next. Windows sometimes disturbs other installed systems. A recent Ubuntu distribution is available [here]


The preferred editors for the tutorial and lab sessions would be either Emacs , Gedit or vi
Gedit and vi are pre-installed with any Ubutu distribution.
To install Emacs in the Ubuntu environment : Open a terminal and type sudo apt-get install emacs

Lab Related Instructions

Submission : All submissions must be made using Google Classroom . You will be notified about mode and way to submit in the tutorial classes. Submissions after the deadline will not be considered.

Programming Language : All programs must be written in the MIPS Assembly / Verilog programming language. Although we will initially help you to debug your codes, the debugging support will be slowly withdrawn as time progresses. For MIPS Assembly / Verilog syntax, look at the lecture slides, or bring with you any reference

Plagiarism : We have a zero tolerance policy towards plagiarism. Any case of cheating or stealing codes would result in imposition of "Unfair Means" charge on you and you will have to face the disciplinary committee of the Department leading to probable de-registration from the course. The person who allowed his program to be copied and the one who copied it will face same consequences. If you copy parts of your code from the Internet, you must mention that clearly in your code. Failure to do that will lead to your entire submission being invalid.

Announcements:

1.         C1 review test solutions

Important Links:

WWW Computer Architecture


Tools , Simulators and Benchmarks

Course Content:

Date

Lectures

Tutorial/Resources

Lab Assignments

Lab Resources

13/01/2020

Introduction


An Introductory Lecture - IITM

Installing Modelsim



Modelsim Setup - Linux (.run file)



modelsim.sh



14/01/2020

Basics of Logic Design - Part 1


Logic Design


20/01/2020

Data Representation


Instructing the Computer-1


Instructing the Computer-2

Assignment 1



Tut 1 : Getting Started with Modelsim


Tut 2 : Verilog Modelling using Modelsim


Detailed Tutorial on Modelsim


Verilog modelling


Combinational Circuit Design Using Verilog


21/01/2020

Basics of Logic Design - Part 2


Sequential Circuits


Design of Sequential Circuits


Design of Finite State Machines

Home-Work Assignment 1

27/01/2020

MIPS Instruction Set Architecture


MIPS Instruction Set


Assignment 2



Sequential Circuit Design Using Verilog


FSM Design Using Verilog


28/01/2020

Discussion on Homework / Evaluation 1

03/02/2020

Assembly Language Programming Using MIPS Instruction Set

Home-Work Assignment 2

Getting Started with MIPS using MARS


JRE Download


MARS Download



04/02/2020

Discussion on Homework / Evaluation 2

10/02/2020

Assembly Language Programming Using MIPS Instruction Set

MIPS Assignment 1



Tut 1: MIPS Programming Using MARS


11/02/2020

Quiz

17/02/2020

Expected leave on account of ASMITA

Lab Test

18/02/2020

Arithmetic for Computer Systems

ALU I

ALU II

ALU III

MIPS Assignment 2


buggy.s




Tut 2: MIPS Programming Using MARS


24/02/2020

C1 Component Period

02/03/2020

Memory System

Exploiting Memory Hierarchy

MIPS Assignment 3






03/03/2020

Cache Memory


Tut 3 : Cache Simulator