Computer Organization and Architecture (2-1-1)


SPRING 2018-19
Lecture: Monday(11:15 AM-1:15PM); Tut: Wednesday(11:15AM - 1:15PM); Lab: Friday (3:00PM - 6:00PM)

Venue: Room-5006, CC3 Building





Course Objective:

This course is primarily meant to teach undergraduate students the basic operations of computing hardware and how it interfaces to software. It would provide the students the understanding of system-level programming and provide a high-level understanding of the role played by compilers, assemblers, instruction sets, and hardware. Students would know how to represent fixed-point and floating point numbers in computer and develop hardware algorithms using them for fixed-point and floating point arithmetic. The course would display understanding of instruction set of RISC processor and develop understanding of how memory is organised and managed in a modern digital computer, including cache , virtual and physical memory. It discusses input-output units and how they communicate with the processor, and how their performance is computed. Finally the students would be able to analyse the performance of a digital computer using different parameters and profiling results for various algorithms in a benchmark.

Course Outline:

Modules Topics
Module 1 : Introduction- Overview of Computer Organisation and Architecture Introduction to Computer Organization and Architecture
Basic organization of computer and block level description of the functional units
Evolution of Computers, Von Neumann model
Review of Digital Systems - Combinatorial and Sequential logic elements, Memory system design: semiconductor memory technologies, memory organization; Concept of Finite State Machine
Introduction to buses and connecting I/O devices to CPU and Memory, bus structure
Performance measure of Computer Architecture
Module 2: Data Representation and Arithmetic Algorithms Number representation: Binary Data representation, Signed Number representation, Fixed and Floating-point data representations. IEEE 754 floating point number representation.
Integer Data computation: Addition, Subtraction, Multiplication: Signed multiplication, Booth\92s algorithm, Division of integers: Restoring and non-restoring division, Floating point arithmetic: Addition, subtraction
Module 3: Processor Organization and Architecture: CPU Architecture, Register Organization , Instruction formats, basic instruction cycle. Instruction interpretation and Sequencing.RTL interpretation of instructions, addressing modes, instruction set.
Control Unit: Soft wired (Micro-programmed) and hardwired control unit design methods. Microinstruction sequencing and execution. Micro operations.
Introduction to RISC and CISC architectures and design issues.
Case study - instruction sets of some common CPUs; Assembly language programming using ARM instrcution set
Module 4: Memory Organisation Introduction to Memory and Memory parameters. Classifications of primary and secondary memories. Types of RAM and ROM, Allocation policies, Memory hierarchy and characteristics.
Cache memory: Concept, architecture (L1, L2, L3), mapping techniques. Cache Coherency, Interleaved and Associative Memory Virtual Memory: Concept, Segmentation and Paging , Page replacement policies.
Module 5: I/O Organization and Peripherals Input/output systems, I/O modules and IO processor
Types of data transfer techniques: Programmed I/O, Interrupt driven I/O and DMA.
Module 6 : Introduction to parallel processing systems Introduction to parallel processing concepts
Flynn\92s classifications
pipeline processing - instruction pipelining, pipeline stages and pipeline hazards





1.      David A. Patterson and John L. Hennessy,, Computer Organization and Design: The Hardware/Software Interface Morgan Kaufmann ARM Edition, 2010.

2.      Carl Hamachar, Zvonco Vranesic and Safwat Zaky, Computer Organization, McGraw Hill

3.      William Stallings, Computer Organization and Architecture: Designing for Performance, Pearson Education

4.      John P. Hayes , Computer Architecture and Organization, McGraw Hill

5.      Morris Mano , Computer System Architecture, Pearson Education





Important Instructions:

1.         Classes will be conducted using slide presentation as well as chalk-board.

2.         Official slide sets and miscellaneous study materials from some of the main text books and elsewhere will be uploaded on the web site on a regular basis.

3.         Every student is expected to have access to at least one of the references mentioned above .

4.         Attendance in the classes is mandatory. If the attendance of a student falls below 75%, he/she may expect a "F Grade"

5.         Grading Policy :

o   30%: Component 1 - Closed book exam (10%); Take home assignment (10%) and Lab assignment (10%)

o   30%: Component 2 - Closed book exam (10%); Take home assignment (10%) and Lab assignment (10%)

o   40%: Component 3 - Closed book written exam

6.         Take home assignments : They will be assigned at the beginning of a module (announcements will be made on the course web-site every week). These assignments will not only help you in development of an in-depth idea of each topic of the course but will also serve to prepare for your written examinations. They will be evaluated during tutorial classes. You will have to explain your solution to the TAs during tutorial classes ( deadlines will be mentioned on the course website) and you may be assigned group projects which have to be demonstrated during tutorial sessions.

7.         The lab classes will mainly consist of (a) Simulation of Verilog models for digital systems (including data path and control path design of a simple hypothetical CPU) using proprietory/open source simulation tools (b) simulation of ARM/MIPS32 programs using emuARM/SPIM simulator. It is expected that students perform the lab assignments seriously to not only for the grades but to have a more refined knowledge of the topics. The details of the lab assignments on the Lab Page of the course website


1.         C1 review test solutions

2.         Semester Project

3.         C2 review test solutions

4.         C3 review test solutions






Additional Resources



Combinational Circuits

Logic Gates

Problem Set 1

Sequential Circuits

Registers and Counters


Problem Set 2

Finite State Machine Design

Data Representation

1. Integer representation

2. Floating Point representation

Problem Set 3

Problem Set 4

Computer Arithmetic

Arithmetic Circuits



Instruction Set Architecture



MIPS Programming


Data Path Design

Control Unit Design

Memory System

Cache Memory



Input Output Organization